Transistors and other devices are connected together to form circuits, such as very large scale integrated circuits, ultra-large scale integrated circuits, memory, and other types of circuits. When the size of transistors, for example, is reduced and device compaction is increased, problems may arise concerning parasitic capacitance, off-state leakage, power consumption, and other characteristics of a device. Semiconductor on insulator (SOI) structures have been proposed in an attempt to overcome some of these problems. However, SOI structures generally have a high rate of defects, as it is difficult to produce thin, uniform semiconductor layers in fabrication. Defect problems in SOI structures include defects within a single wafer (e.g., the thickness of a wafer differs at various points on the wafer) and defects from wafer to wafer (e.g., an inconsistent mean silicon layer thickness among SOI wafers). As transistor devices are made smaller, channel length is generally reduced. Reduction in the channel length generally results in an increased device speed, as gate delay typically decreases. However, a number of side effects may arise when channel length is reduced. Such negative side effects may include, among others, increased off-state leakage current due to threshold voltage roll-off (e.g., short channel effects).
One way of increasing device speed is to use higher carrier mobility semiconductor materials to form the channel. Carrier mobility is generally a measure of the velocity at which carriers flow in a semiconductor material under an external unit electric field. In a transistor device, carrier mobility is a measure of the velocity at which carriers (e.g., electrons and holes) flow through or across a device channel in an inversion layer. For example, higher carrier mobility has been found in narrow bandgap materials that include germanium (Ge). Germanium has electron and hole mobility of about 3900 cm2/Vs and about 1900 cm2/Vs, respectively, which are higher than that of electron and hole mobility of silicon, which are 1500 cm2/Vs and 450 cm2/Vs, respectively.
Current transistor structures used compressively strained Ge, either on a SiGe graded buffer or on a Si substrate, to enhance hole mobility in Ge pMOSFET devices, where a room temperature hole mobility of about 2100 cm2/Vs had been observed. However, disadvantageously, the hole mobility observed in compressively strained Ge, though much higher than in a conventional Si pMOSFET device, is still not high enough to be compatible with the highest electron mobility achievable from III-V semiconductor materials, such as, for example, InSb (with a electron mobility of about 80,000 cm2/Vs).
The prior art fails to provide a material adapted for use on a transistor substrate and having a higher hole mobility than compressive Ge.
For simplicity and clarity of illustration, elements in the drawings have not necessarily been drawn to scale. For example, the dimensions of some of the elements may be exaggerated relative to other elements for clarity. Where considered appropriate, reference numerals have been repeated among the drawings to indicate corresponding or analogous elements.